1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and in particular to an improved method for manufacturing a semiconductor device which can achieve a high integration of the semiconductor device by minimizing an area occupied by device isolation film for defining active regions, and use the device isolation film for a unit cell and a switching device.
2. Description of the Background Art
A conventional device isolation film is a trench type and positioned along the word line between active regions formed at both sides of a word line.
FIG. 1 is a cross-sectional view illustrating a conventional semiconductor device, wherein active regions are formed in I or Z shape, and a trench type device isolation film is formed therebetween.
Referring to FIG. 1, a device isolation film 13 defining active regions is formed on a semiconductor substrate 11.
Here, the device isolation film 13 is formed by depositing a pad oxide film (not shown) and a nitride film (not shown) on the semiconductor substrate 11, etching the nitride film, the pad oxide film and a predetermined thickness of semiconductor substrate 11 via a photo-etching process using a device isolation mask (not shown) to form a trench, and filling the trench.
Thereafter, a gate electrode 17 is formed in the active regions of the semiconductor substrate 11. Here, a gate oxide film 15 is formed in the interface of the gate electrode 17 and the semiconductor substrate 11.
A low concentration impurity junction region (not shown) is formed by ion-implanting a low concentration impurity into the semiconductor substrate 11 using the gate electrode 17 as a mask.
An insulating spacer 19 is formed on the sidewalls of the gate electrode 17, and a high concentration impurity junction region (not shown) is formed by ion-implanting a high concentration impurity into the semiconductor substrate 11 using the gate electrode 17 and the insulating spacer 19 as masks, thereby forming a source/drain region (not shown).
An interlayer insulating film (not shown) is formed on the entire surface of the resultant structure, and a source region contact plug 21 and a drain region contact plug 23 are formed to contact the source/drain region through the interlayer insulating film.
As described above, the conventional method for manufacturing the semiconductor device has a disadvantage in that it cannot achieve a high integration of the device because the trench type device isolation film occupies large area. To overcome the above problem, a method for manufacturing a semiconductor device has been proposed wherein step difference is generated in the device isolation region and the insulating spacer is formed on the boundaries of the step difference. However, the proposed method fails to provide a contact margin.
Accordingly, it is an object of the present invention to provide a method for manufacturing a semiconductor device wherein two different types of active regions are alternately arranged to have a shape of a matrix for minimization of a device isolation region by forming device isolation films defining the active regions on a semiconductor substrate in a form of a spacer to turn most of the conventional device isolation regions into the active regions.
In order to achieve the above-described object of the invention, there is provided a method for manufacturing a semiconductor device including the steps of: (a) forming a stacked structure of a pad oxide film and a nitride film on a semiconductor substrate; (b) forming trenches by etching the stacked structure and the semiconductor substrate by a predetermined depth, wherein trenches are alternately arranged in a form of a matrix in the semiconductor substrate so that the trenches do not adjoin each other; (c) forming a first insulating spacer on the sidewalls of the trench; (d) selectively forming an epitaxial silicon layer in the trenches to fill the trenches and extrude upward higher than the nitride film; (e) planarizing the epitaxial silicon layer using the stacked structure of the pad oxide film and the nitride film as an etch stop layer; (f) removing the stacked structure of the pad oxide film and the nitride film to expose the semiconductor substrate to make the planarized epitaxial silicon layer extruded upward; (g) forming a second insulating spacer on a sidewall of the extruded epitaxial silicon layer so that the epitaxial silicon layer can be electrically isolated with an adjacent semiconductor substrate; (h) forming gate oxide film patterns on the epitaxial silicon layer and the semiconductor substrate, respectively; (i) forming a gate electrode on the each gate oxide film patterns; and (j) forming a source and a drain on the both sides of the gate electrode by an impurity implantation process using the gate electrode as a mask.
In addition, the first insulating spacer comprises a stacked structure of an oxide film and a nitride film.
The second insulating spacer comprises a stacked structure of an oxide film and a nitride film.
The step of planarizing the epitaxial silicon layer is performed by a chemical mechanical polishing process.
The semiconductor device is used as a display conversion device using a transistor as an individual unit system.
There is also provided a semiconductor device comprising: a semiconductor substrate, as a first active region, on which rectangular trenches are alternately formed in a form of a matrix; an epitaxial silicon layer, as a second active region, filling the trenches and extruding upward so that the surface of the epitaxial silicon layer is higher than the surface of the substrate, wherein the epitaxial silicon layer in the trenches is electrically isolated with the substrate by a first insulating spacer interposed therebetween and the extruded epitaxial silicon layer is electrically isolated with the substrate by a second insulating spacer formed on both sides of the extruded epitaxial silicon layer; a gate electrode pattern formed on the first and the second active regions interposing a gate oxide; and source and drain regions on the both sides of the gate electrode pattern in the first and the second active regions.
The first insulating spacer comprises a stacked structure of an oxide film and a nitride film.
The second insulating spacer comprises a stacked structure of an oxide film and a nitride film.
On the other hand, the principle of the present invention will now be explained.
Trenches are formed by etching rectangular device isolation regions defining rectangular active regions on a semiconductor substrate, and a selective epitaxial-growth layer filling the trenches is grown using the semiconductor substrate at the bottom of the trenches as a seed. Here, an insulating spacers are formed between the device isolation region and the active region before and after forming the selective epitaxial-growth layer.
As a result, the insulating spacer is positioned on the boundaries of the active regions composed of the selective epitaxial-growth layer in the device isolation region and the active regions composed of the semiconductor substrate, thereby forming the active regions in a matrix shape so that the active regions can separately adjoin each other and the same active regions cannot adjoin each other. Accordingly, a size of the device is minimized, and each of the transistors can be used as individual unit systems such as display conversion devices.
Here, one side of a word line passing through the respective active regions is used as a source, and the other side of the word line is used as a drain. The drain is used as a source of the adjacent word line.